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 EMIF02-USB05C2
IPADTM 2 line EMF filter including ESD protection
Main application
When EMI filtering is ESD sensitive equipment is required:

Mobile phones and communication systems Computers, printers and MCU boards
Description
The EMIF02-USB05C2 is a highly integrated array designed to suppress EMI / RFI noise for USB port filtering. The EMIF02-USB05C2 FlipChip packaging means the package size is equal to the die size. Additionally, this low-pass filter includes an ESD protection circuitry to prevent damage to the application when subjected to ESD surges up to 15 kV. This device is designed to be fully compatible with USB standards. Coated Flip-Chip (8 Bumps)
Pin configuration (bump side)
2
IO4 O2 O1 IO3
1
VCC I2 I1 GND
A B C D
Benefits

2 x EMI low-pass filter + 2 line ESD protection 1.5 k pull-up included High efficiency in EMI filtering Lead free coated package Very low PCB space consumption: 1.92 mm x 0.92 mm Very thin package: 0.69 mm High reliability offered by monolithic integration High reduction of parasitic elements through integration and wafer level packaging USB full speed (12 Mbps), OTG compliant
Functional diagram
IO4 IO3 R1 Input 2 Output2 R3 VCC
GND
R2 Input 1 Output 1
Order code
Part Number EMIF02-USB05C2 Marking GV
Complies with following standards:
IEC 61000-4-2 level 4 15 kV (air discharge) 8 kV (contact discharge)
MIL STD 883G - Method 3015-7 Class 3
TM: IPAD is a trademark of STMicroelectronics
Rev 2 1/7
www.st.com 7
November 2006
Characteristics
EMIF02-USB05C2
1
Characteristics
Table 1.
Symbol Tj Top Tstg
Absolute ratings (limiting values)
Parameter and test conditions Maximum junction temperature Operating temperature range Storage temperature range Value 125 - 40 to + 85 - 55 to + 150 Unit C C C
Table 2.
Symbol VBR IRM VRM Cline
Electrical characteristics (Tamb = 25 C)
Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage Input capacitance per line
VBR VRM IR IRM IRM IR VRM VBR V I
Symbol VBR IRM R1, R2 R3 Cline Matching
Test conditions IR = 1 mA VRM = 5 V per line I = 10 mA I = 1 mA @0V Serial resistance matching
Tolerance
Min. 6
Typ.
Max. 9 1
Unit V A k pF %
5% 5%
33 1.5 30 1
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EMIF02-USB05C2
Characteristics
Figure 1.
0.00
S21 (dB) attenuation measurement Figure 2.
dB
0.00 -10.00 -20.00
Analog crosstalk measurements
dB
-10.00 -30.00 -40.00 -20.00 -50.00 -60.00 -70.00 -30.00 -80.00 -90.00 1.0G -100.00 100.0k 1.0M
F (Hz)
-40.00 100.0k 1.0M 10.0M 100.0M
F (Hz)
10.0M 100.0M 1.0G
Figure 3.
ESD response to IEC 61000-4-2 Figure 4. (+15 kV air discharge) on one input (Vin) and on one output (Vout)
ESD response to IEC 61000-4-2 (-15 kV air discharge) on one input (Vin) and on one output (Vout)
V(in) 5 V/d V(in) 5 V/d
V(out) 5 V/d V(out) 5 V/d
100 ns/d
100 ns/d
Figure 5.
Junction capacitance versus reverse voltage applied
CLINE (pF)
35 30 25 20 15 10 5 0 0 1 2 3 4 5
Vosc = 30 mV Vosc=30mV F=1MHz F = 1 MHz Tamb = 25 C Ta=25 C
VLINE (V)
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Ordering information scheme Figure 6. Aplac model device structure
Lbump Rbump
A1 D2 R3 B1 A2
EMIF02-USB05C2
bulk
MODEL = D2 Lbump Rbump
B2
Rbump Lbump
R1
Rbump Lbump
Rbump
D1
MODEL = D1 MODEL = D1 MODEL = D1
Lbump
Lbump Rbump
bulk
C1
bulk
R2
bulk Lbump Rbump
C2
MODEL = D1
MODEL = D1
Rbump Lbump
bulk
bulk
Cgn d
Lgn d
MODEL = D1
MODEL = D1
Rgn d
bulk
bulk
Figure 7.
Aplac model parameters
aplacvar R1 33 aplacvar R2 33 aplacvar R3 1.5k aplacvar Cz_D1 15pF aplacvar Rs_D1 1 aplacvar Cz_D2 300pF aplacvar Rs_D2 0.3 aplacvar Lgnd 100pH aplacvar Rgnd 100m aplacvar Cgnd 0.4pF aplacvar Lbump 50pH aplacvar Rbump 20m Diode D1 BV=7 IBV=1m CJO=Cz_d1 M=0.3333 RS=Rs_d1 VJ=0.6 TT=100n Diode D2 BV=7 IBV=1m CJO=Cz_d2 M=0.3333 RS=Rs_d2 VJ=0.6 TT=100n
2
Ordering information scheme
EMIF
EMI Filter Number of lines Information 3 letters = application 2 digits = version
yy
-
xxx zz
Cx
Package C = Coated Flip-Chip x = 2: Leadfree Pitch = 500 m, Bump = 315 m
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EMIF02-USB05C2
Package information
3
Package information
Figure 8. Flip-Chip package dimensions
500 m 10
315 m 50
690 m 65
500 m 10
0.92 mm 50 m
Figure 9.
Foot print recomendations
1.92 mm 50 m
Figure 10. Marking
Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week)
Copper pad Diameter: 250 m recommended, 300 m max
E
Solder stencil opening: 330 m
Solder mask opening recommendation: 340 m min for 315 m copper pad diameter
xxz y ww
Figure 11. Flip-Chip tape and reel specification
Dot identifying Pin A1 location 4 +/- 0.1 O 1.5 +/- 0.1
1.75 +/- 0.1 3.5 +/- 0.1
0.73 +/- 0.05
All dimensions in mm
8 +/- 0.3
STE
STE
STE
xxx yww
User direction of unreeling
xxx yww
xxx yww
4 +/- 0.1
5/7
Ordering information Note: More packing information is available in the application notes AN1235: "Flip-Chip: Package description and recommendations for use" AN1751: "EMI Filters: Recommendations and measurements"
EMIF02-USB05C2
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
4
Ordering information
Ordering code EMIF02-USB05C2 Marking GV Package Flip-Chip Weight 2.7 mg Base qty 5000 Delivery mode Tape and reel 7"
5
Revision history
Date 14-Mar-2005 13-Nov-2006 Revision 1 2 Initial release. Reformatted to current standards. Modified functional diagram on page 1 to show connections. Updated Aplac model information. Changes
6/7
EMIF02-USB05C2
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
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